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| SINGLE SUPPLY QUAD PECL-TO-TTL W/LATCHED OUTPUT ENABLE FEATURES s s s s Translates positive ECL to TTL (PECL-to-TTL) 300ps pin-to-pin skew 500ps part-to-part skew Differential internal design for increased noise immunity and stable threshold inputs s VBB reference output s s s s Single supply Enable input Latch enable input Extra TTL and ECL power/ground pins to reduce cross-talk/noise s High drive capability: 24mA each output s Fully compatible with industry standard 10K, 100K I/O levels s Available in 16-pin SOIC package ClockWorksTM SY10H841 SY100H841 FINAL DESCRIPTION The SY10/100H841 are single supply, low skew translating 1:4 clock drivers. The devices feature a 24mA TTL output stage, with AC performance specified into a 50pF load capacitance. A latch is provided on-chip. When LEN is LOW (or left open, in which case it is pulled low by the internal pulldowns) the latch is transparent. A HIGH on the enable pin (EN) forces all outputs LOW. As frequencies increase to 40MHz and above, precise timing and shaping of clock signals becomes extremely important. The H841 solves several clock distribution problems such as minimizing skew (300ps), maximizing clock fanout (24mA drive), and precise duty cycle control through a proprietary differential internal design. The 10K version is compatible with 10KH ECL logic levels. The 100K version is compatible with 100K levels. BLOCK DIAGRAM PIN CONFIGURATION LEN EN GE VE 1 2 3 4 5 6 7 8 SOIC Z16-1 16 15 14 13 12 11 10 9 Q3 GT Q2 VT VT Q1 GT Q0 Q0 Q1 D D VBB Q2 VBB D D LEN Pin GT DQ Q3 PIN NAMES Function TTL Ground (0V) TTL VCC (+5.0V) ECL VCC (+5.0V) ECL Ground (0V) Signal Input (PECL) VBB Reference Output (PECL) Signal Outputs (TTL) Enable Input (PECL) Latch Enable Input Rev.: F Amendment: /0 EN GT VT VE GE D, D VBB Q0 - Q3 EN LEN 1 Issue Date: May, 1999 Micrel ClockWorksTM SY10H841 SY100H841 TRUTH TABLE D L H X X LEN L L X H EN L L H L Q L H L Latch PIN DESCRIPTION Pin 1 2 3 4 5 Symbol LEN EN GE VE D D VBB GT Q0 GT Q1 VT VT Q2 GT Q3 Description Latch Enable Input Enable Input (PECL) ECL Ground (0V) ECL VCC (+5.0V) ECL Signal Input (Non-inverting) ECL Signal Input (Inverting) VBB Reference Output (PECL) TTL Ground (0V) Signal Output (TTL) TTL Ground (0V) Signal Output (TTL) TTL VCC (+5.0V) TTL VCC (+5.0V) Signal Output (TTL) TTL Ground (0V) Signal Output (TTL) ABSOLUTE MAXIMUM RATINGS(1) Symbol VE (ECL) VT (TTL) VI (ECL) VOUT (TTL) Tstore TA Rating Power Supply Voltage Input Voltage Storage Temperature Operating Temperature Value -0.5 to +7.0 -0.5 to +7.0 0.0 to VEE 0.0 to VT -65 to +150 0 to +85 Unit V V C C 6 7 8 9 10 11 12 13 14 15 16 NOTE: 1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG conditions for extended periods may affect device reliability. VCC AND CLOAD Ranges to meet duty cycle requirement: 0C TA 85C. Output duty cycle measured relative to 1.5V. Symbol PW Parameter Ranges of VCC and CL to meet min. pulse width (HIGH or LOW) at fOUT 40MHz Ranges of VCC and CL to meet min. pulse width (HIGH or LOW) at fOUT 50MHz VCC CL PW VCC CL PW Min. 4.75 10 11 4.875 15 9.0 Typ. 5.0 -- -- 5.0 -- -- Max. 5.25 50 -- 5.125 27 -- Unit V pF ns V pF ns Condition All Outputs PW All Outputs DC CHARACTERISTICS VT = VE = 5.0V 5% TA = 0C Symbol IEE ICCH ICCL Parameter Power Supply Current Power Supply Current ECL TTL Min. -- -- -- Max. 40 20 25 TA = +25C Min. -- -- -- Max. 40 20 25 TA = +85C Min. -- -- -- Max. 40 20 25 Unit mA mA Condition VE Pin Total all VT pins 2 Micrel ClockWorksTM SY10H841 SY100H841 TTL DC ELECTRICAL CHARACTERISTICS VT = VE = +5.0V 5% TA = 0C Symbol VOH VOL IOS Parameter Output HIGH Voltage Output LOW Voltage Output Short Circuit Current Min. 2.5 2.0 -- -80 Max. -- -- 0.5 -200 TA = +25C Min. 2.5 2.0 -- -80 Max. -- -- 0.5 -200 TA = +85C Min. 2.5 2.0 -- -80 Max. -- -- 0.5 -200 Unit V V mA Condition IOH = -3.0mA IOH = -15mA IOL = 24mA VOUT = 0V 10H ECL DC ELECTRICAL CHARACTERISTICS(1) VT = VE = +5.0V 5% TA = 0C Symbol IIH IIL VIH VIL VBB Parameter Input HIGH Current Input LOW Current Input HIGH Voltage Input LOW Voltage Output Reference Voltage Min. -- 0.5 3.830 3.050 3.620 Max. 225 -- 4.160 3.520 3.730 TA = +25C Min. -- 0.5 3.870 3.050 3.650 Max. 175 -- 4.190 3.520 3.750 TA = +85C Min. -- 0.5 3.940 3.050 3.690 Max. 175 -- 4.280 3.555 3.810 Unit A A V V V Condition -- -- VE = 5.0V VE = 5.0V VE = 5.0V NOTE: 1. ECL VIH, VIL and VBB are referenced to VCCE and will vary 1:1 with the power supply. The levels shown are for IVT = IVO = VCCE = +5.0V. 100H ECL DC ELECTRICALCHARACTERISTICS(1) VT = VE = +5.0V 5% TA = 0C Symbol IIH IIL VIH VIL VBB Parameter Input HIGH Current Input LOW Current Input HIGH Voltage Input LOW Voltage Output Reference Voltage Min. -- 0.5 3.835 3.190 3.620 Max. 225 -- 4.120 3.525 3.740 TA = +25C Min. -- 0.5 3.835 3.190 3.620 Max. 175 -- 4.120 3.525 3.740 TA = +85C Min. -- 0.5 3.835 3.190 3.620 Max. 175 -- 4.120 3.525 3.740 Unit A A V V V Condition -- -- VE = 5.0V VE = 5.0V VE = 5.0V NOTE: 1. ECL VIH, VIL and VBB are referenced to VCCE and will vary 1:1 with the power supply. The levels shown are for IVT = IVO = VCCE = +5.0V. 3 Micrel ClockWorksTM SY10H841 SY100H841 AC CHARACTERISTICS VT = VE = 5.0V 5% TA = 0C Symbol tPLH tPHL tskpp tskew++ tskew- - tPLH tPHL tPLH tPHL tr tf fMAX -- -- tS tH Parameter Propagation Delay D to Output Part-to-Part Skew(1,4) Within-Device Skew(2,4) Within-Device Skew(3,4) Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Min. 2.7 -- -- -- 2.7 2.7 -- 160 1.5 1.0 0.75 0.75 Max. 3.7 0.5 0.3 0.3 3.7 3.7 1.5 -- -- -- -- -- TA = +25C Min. 2.7 -- -- -- 2.7 2.7 -- 160 1.5 1.0 0.75 0.75 Max. 3.7 0.5 0.3 0.3 3.7 3.7 1.5 -- -- -- -- -- TA = +85C Min. 2.7 -- -- -- 2.7 2.7 -- 160 1.5 1.0 0.75 0.75 Max. 3.7 0.5 0.3 0.3 3.7 3.7 1.5 -- -- -- -- -- Unit ns ns ns ns ns ns ns MHz ns ns ns ns Condition CL = 50pF CL = 50pF CL = 50pF CL = 50pF CL = 50pF CL = 50pF CL = 50pF CL = 50pF -- -- -- -- Propagation Delay LEN to Q Propagation Delay EN to Output Output Rise/Fall Time 1.0V to 2.0V Max. Input Frequency(5,6) Pulse Width Recovery Time EN Set-up Time D, EN Hold Time D, EN NOTES: 1. Device-to-Device Skew considering HIGH-to-HIGH transitions at common VCC level. 2. Within-Device Skew considering HIGH-to-HIGH transitions at common VCC level. 3. Within-Device Skew considering LOW-to-LOW transitions at common VCC level. 4. All skew parameters are guaranteed but not tested. 5. Frequency at which output levels will meet at 0.8V to 2.0V minimum swing. 6. The fMAX value is specified as the minimum guaranteed maximum frequency. Actual operational maximum frequency may be greater. PRODUCT ORDERING CODE LOGIC DIAGRAM Ordering Code SY10H841ZC SY10H841ZCTR SY100H841ZC SY100H841ZCTR Package Type Z16-1 Z16-1 Z16-1 Z16-1 Operating Range Commercial Commercial Commercial Commercial 4 Micrel ClockWorksTM SY10H841 SY100H841 TTL SWITCHING CIRCUIT VEE USE 0.1F CAPACITORS FOR DECOUPLING. PECL 50 COAX PULSE GENERATOR IN DEVICE UNDER TEST TTL OUT 450 VCC & VCCO 50 COAX 50 COAX USE OSCILLOSCOPE INTERNAL 50 LOAD FOR TERMINATION. CH A OSCILLOSCOPE CH B ECL/TTL PROPAGATION DELAY -- SINGLE ENDED 50% VIN Tpd++ 1.5V VOUT Tpd- - ECL/TTL WAVEFORMS: RISE AND FALL TIMES 2.0V VOUT Trise Tfall 0.8V 5 Micrel ClockWorksTM SY10H841 SY100H841 16 LEAD SOIC .300" WIDE (Z16-1) Rev. 03 MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD FAX SANTA CLARA WEB CA 95054 USA + 1 (408) 980-9191 + 1 (408) 914-7878 http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. (c) 2000 Micrel Incorporated 6 |
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